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general description the MAX5547 dual, 10-bit, dual range, digital-to-analog converter (dac) sinks up to 3.6ma of current, making it ideal for laser-driver-control applications. parallel the MAX5547 outputs to sink higher current (up to 7.2ma max). operating from a single +2.7v to +5.25v supply, the MAX5547 typically consumes 1ma (internal reference). the MAX5547 operates from a precision +2.5v internal 4ppm/? reference or an external reference in the +2.45v to +2.55v range. the maximum full-scale cur- rent-sink range is software programmable to 3.6ma or 1.2ma for each dac. a 10mhz spi-compatible serial interface configures the device. the MAX5547 is available in a 3mm x 3mm x 0.8mm 8- pin tdfn package and is specified over the -40? to +85? extended temperature range. applications laser-driver control pin-diode bias currents modulation currents average power extinction ratios features ? dual current-sink dacs ? 10-bit resolution ? two software-programmable full-scale current ranges: 3.6ma or 1.2ma ? parallelable outputs for up to 7.2ma (max) ? +2.5v internal reference drifts only 4ppm/? ? +2.7v to +5.25v single-supply operation ? inl: ? lsb (1.2ma output) ? dnl: ?.75 lsb (guaranteed monotonic) ? low +0.8v output compliance ? ultra-small, 3mm x 3mm x 0.8mm, 8-pin tdfn package MAX5547 dual, 10-bit, current-sink output dac ________________________________________________________________ maxim integrated products 1 19-3988; rev 0; 2/06 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ordering information +2.7v to +5.25v +2.5v +3.3v outa outb cs din sclk microcontroller with adc ref i i biasset modset dis bc_mon out- out+ bias ain0 ain1 ain2 cs mosi sclk gnd gnd v cc ref ferrite bead i/o1 i/o2 i/o3 tx_disable mod-def1 mod-def2 +3.3v gnd v cc +3.3v +3.3v MAX5547 max3736 v dd t ypical operating circuit part temp range pin- package top mark pkg code MAX5547eta -40? to +85? 8 tdfn-ep* apf t833-2 spi is a trademark of motorola, inc. * ep = exposed pad. pin configuration appears at end of data sheet.
MAX5547 dual, 10-bit, current-sink output dac 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to gnd .............................................................-0.3v to +6v outa, outb, ref to gnd ........................-0.3v to (v dd + 0.3v) sclk, din, cs to gnd ............................................-0.3v to +6v continuous power dissipation (t a = +70?) 8-pin tdfn (derate 18.2mw/? above +70?) .......1454.5mw operating temperature range ...........................-40? to +85? junction temperature .....................................................+150? storage temperature range ............................-65? to +150? lead temperature (soldering, 10s) ................................+300? electrical characteristics (v dd = +2.7 to +5.25v, gnd = 0, external reference = +2.5v, output voltage = +2.0v, t a = -40? to +85?. typical values are at v dd = +3.0v, and t a = +25?.) (note 1) parameter symbol conditions min typ max units static performance?nalog section resolution 10 bits i out _ = 1.2ma 4 integral nonlinearity (note 2) inl i out _ = 3.6ma 6 lsb differential nonlinearity dnl guaranteed monotonic ?.75 lsb offset error oe code = 030h ? lsb offset temperature coefficent 0.05 lsb/? i out = 1.2ma ?.1 ? gain error ge measured from code 030h to 3ffh i out = 3.6ma ?.1 ?.5 % i out_ = 1.2ma 15 gain temperature coefficient i out_ = 3.6ma 25 ppm/? line regulation v dd = +2.7v to +5.25v 0.8 lsb/v output crosstalk outa = midscale, outb switching from 030h to 3ffh 54 db reference internal-reference voltage v ref t a = +25? 2.48 2.5 2.52 v internal-reference temperature coefficient (note 3) 4 35 ppm/? internal-reference load regulation 0? < i ref < +300? 1 3.5 ? internal-reference power-up time c ref = 1?, to 0.05% 0.55 ms internal-reference sink current 50 ? internal-reference source current 300 ? ref capacitive load (note 3) 0.1 10.0 ? reference line regulation v dd = +2.7v to +5.25v 25 ?/v f = 0.1hz to 10hz 10 internal-reference noise f = 10hz to 10khz 27 ? rms external-reference range v ref 2.45 2.55 v
MAX5547 dual, 10-bit, current-sink output dac _______________________________________________________________________________________ 3 electrical characteristics (continued) (v dd = +2.7 to +5.25v, gnd = 0, external reference = +2.5v, output voltage = +2.0v, t a = -40? to +85?. typical values are at v dd = +3.0v, and t a = +25?.) (note 1) parameter symbol conditions min typ max units external-reference input impedance r ref 90 k ? dac outputs code = 030h 50 1.2ma low-current range code = 3ffh 1170 1200 1230 code = 030h 150 output current (note 4) i out _ 3.6ma high-current range code = 3ffh 3400 3600 3800 ? 1.2ma full-scale current 1.17 lsb size 3.6ma full-scale current 3.52 ? current-source compliance voltage range i out _ = full-scale (note 5) 0.8 v dd v i out _ = 1.2ma 800 output impedance at full-scale current i out _ = 3.6ma 180 k ? dynamic performance settling time t s to 1% (note 6) 10 ? f = 0.1hz to 10hz 0.05 output noise i rms f = 10hz to 10khz 0.35 lsb rms supply feedthrough 100mv, 1khz signal added to v dd 0.85 lsb/v digital feedthrough r load = 500 ? , c load = 100pf 2 pa s digital-to-analog glitch impulse r load = 500 ? , c load = 100pf 16 pa s dac-to-dac full-scale current matching 2% power supplies supply voltage v dd +2.70 +5.25 v internal reference mode 1.1 2 supply current i dd v dd = +5.25v, no load, sclk not switching external reference mode 0.75 1.5 ma logic and control inputs input high voltage v ih (note 7) 0.7 x v dd v input low voltage v il (note 7) 0.8 v input hysteresis v hys 0.05 x v dd v input capacitance c in 10 pf input leakage current i in ? ?
MAX5547 dual, 10-bit, current-sink output dac 4 _______________________________________________________________________________________ electrical characteristics (continued) (v dd = +2.7 to +5.25v, gnd = 0, external reference = +2.5v, output voltage = +2.0v, t a = -40? to +85?. typical values are at v dd = +3.0v, and t a = +25?.) (note 1) parameter symbol conditions min typ max units spi timing characteristics (see figure 1) sclk clock period t cp 100 ns sclk pulse-width high t ch 40 ns sclk pulse-width low t cl 40 ns cs fall to sclk fall setup time t css 25 ns sclk fall to cs rise hold time t csh 50 ns din to sclk fall setup time t ds 40 ns din to sclk fall hold time t dh 0ns cs pulse-width high t csw 100 ns note 1: devices are 100% production tested at t a = +25?. limits over temperature are guaranteed by design. note 2: inl linearity is from code 48 to code 1023. note 3: guaranteed by design. not production tested. note 4: the dacs continue to operate at currents lower than 50? on the 1.2ma range and 150? on the 3.6ma range. however, performance is not guaranteed at these low currents. a code of all zeros has a nominal output current of 0?. note 5: compliance voltage range is defined as the range where the output current is -2 lsb of its value at v out = +1v. note 6: settling time is measured from 0.25 x full scale to 0.75 x full scale. note 7: the device draws higher supply current when the digital inputs are driven with voltages between (v dd - 0.5v) and (gnd + 0.5v). see supply current vs. digital input voltage in the typical operating characteristics . t ypical operating characteristics (v dd = +3.0v, gnd = 0, external reference = +2.5v, t a = +25?, unless otherwise noted.) -4 -3 -2 -1 0 1 2 3 4 0 256 512 768 1024 integral nonlinearity vs. digital input code (1.2ma setting) MAX5547 toc01 digital input code inl (lsb) -4 -3 -2 -1 0 1 2 3 4 0 256 512 768 1024 integral nonlinearity vs. digital input code (3.6ma setting) MAX5547 toc02 digital input code inl (lsb) -1.00 -0.75 -0.50 -0.25 0 0.25 0.50 0.75 1.00 0 256 512 768 1024 differential nonlinearity vs. digital input code (1.2ma setting) MAX5547 toc03 digital input code dnl (lsb)
MAX5547 dual, 10-bit, current-sink output dac _______________________________________________________________________________________ 5 t ypical operating characteristics (continued) (v dd = +3.0v, gnd = 0, external reference = +2.5v, t a = +25?, unless otherwise noted.) -1.00 -0.75 -0.50 -0.25 0 0.25 0.50 0.75 1.00 0 256 512 768 1024 differential nonlinearity vs. digital input code (3.6ma setting) MAX5547 toc04 digital input code dnl (lsb) 8 6 4 2 0 -40 10 -15 35 60 85 maximum integral nonlinearity vs. temperature (3.6ma setting) MAX5547 toc05 temperature ( c) inl (lsb) 0 0.2 0.1 0.4 0.3 0.5 0.6 -40 85 maximum differential nonlinearity vs. temperature (3.6ma setting) MAX5547 toc06 temperature ( c) dnl (lsb) 10 -15 35 60 20 15 10 5 0 -40 10 -15 35 60 85 zero-scale sink current vs. temperature MAX5547 toc07 temperature ( c) zero-scale current ( a) 3.6ma full scale 1.2ma full scale 1.196 1.200 1.198 1.204 1.202 1.208 1.206 1.210 -40 10 -15 35 60 85 full-scale sink current vs. temperature (1.2ma setting) MAX5547 toc08 temperature ( c) full-scale current (ma) 3.50 3.60 3.55 3.70 3.65 3.75 3.80 -40 10 -15 35 60 85 full-scale sink current vs. temperature (3.6ma setting) MAX5547 toc09 temperature ( c) full-scale current (ma) 2.4950 2.4952 2.4956 2.4954 2.4958 2.4960 2.5 3.5 3.0 4.0 4.5 5.0 5.5 internal reference voltage vs. supply voltage MAX5547 toc10 supply voltage (v) internal reference voltage (v) 2.4940 2.4935 2.4930 2.4925 2.4920 -40 10 -15 35 60 85 internal reference voltage vs. temperature MAX5547 toc11 temperature ( c) internal reference voltage (v) 490 494 492 498 496 500 502 2.5 3.5 4.0 3.0 4.5 5.0 5.5 supply current vs. supply voltage MAX5547 toc12 supply voltage (v) i dd ( a) external reference = 2.5v, cs = sclk = din = gnd
MAX5547 dual, 10-bit, current-sink output dac 6 _______________________________________________________________________________________ t ypical operating characteristics (continued) (v dd = +3.0v, gnd = 0, external reference = +2.5v, t a = +25?, unless otherwise noted.) 1.12 1.11 1.10 1.09 1.08 2.5 4.0 3.0 3.5 4.5 5.0 5.5 supply current vs. supply voltage MAX5547 toc13 supply voltage (v) i dd (ma) internal reference, cs = sclk = din = gnd 1.2 1.0 0.8 0.6 0.4 -40 10 -15 35 60 85 supply current vs. temperature MAX5547 toc14 temperature ( c) i dd (ma) internal reference external reference 1.190 1.200 1.195 1.210 1.205 1.215 1.220 023 1 456 i out vs. v out (1.2ma setting) MAX5547 toc15 output voltage (v) i out_ (ma) v dd = 5.25v t a = +85 c t a = -40 c t a = +25 c 3.50 3.60 3.55 3.70 3.65 3.75 3.80 023 1 456 i out vs. v out (3.6ma setting) MAX5547 toc16 output voltage (v) i out_ (ma) v dd = 5.25v t a = +85 c t a = -40 c t a = +25 c supply current vs. digital input voltage 100 1000 10,000 digital input voltage (v) 5 4 3 2 1 06 i dd ( a) cs , din, sclk shorted together v dd = 5.25v v dd = 3v MAX5547 toc17 output noise vs. frequency MAX5547 toc18 frequency (khz) 1 0.1 0.02 0.04 0.06 0.08 0.10 0 0.01 10 noise (lsb rms / hz) 1.00 s/div settling time (full-scale positive step) (i out = 1.2ma) MAX5547 toc19 out_ 500mv/div sclk 2v/div gnd 3v v pullup = 3v, r out = 500 ? , c out = 10pf 15 16 1.00 s/div settling time (full-scale positive step) (i out = 3.6ma) MAX5547 toc20 out_ 500mv/div sclk 2v/div gnd 3v v pullup = 3v, r out = 500 ? , c out = 10pf 15 16 1.00 s/div settling time (full-scale negative step) (i out = 1.2ma) MAX5547 toc21 out_ 500mv/div sclk 2v/div gnd 3v v pullup = 3v, r out = 500 ? , c out = 10pf 15 16
MAX5547 dual, 10-bit, current-sink output dac _______________________________________________________________________________________ 7 t ypical operating characteristics (continued) (v dd = +3.0v, gnd = 0, external reference = +2.5v, t a = +25?, unless otherwise noted.) 1.00 s/div settling time (full-scale negative step) (i out = 3.6ma) MAX5547 toc22 out_ 500mv/div sclk 2v/div gnd 3v v pullup = 3v, r out = 500 ? , c out = 10pf 15 16 1.00 s/div settling time (half-scale positive step) (i out = 1.2ma) MAX5547 toc23 out_ 200mv/div sclk 2v/div gnd v pullup = 3v, r out = 500 ? , c out = 10pf, code = 0.25 x fs to 0.75 x fs 15 16 1.00 s/div settling time (half-scale negative step) (i out = 1.2ma) MAX5547 toc24 out_ 200mv/div sclk 2v/div gnd v pullup = 3v, r out = 500 ? , c out = 10pf, code = 0.75 x fs to 0.25 x fs 15 16 100 s/div internal reference power-up MAX5547 toc25 ref 1v/div sclk 2v/div gnd c ref = 1 f 14 15 16 gnd -0.5 -0.2 -0.3 -0.4 -0.1 0 0.1 0.2 0.3 0.4 0.5 -40 10 -15 35 60 85 supply feedthrough vs. temperature MAX5547 toc26 temperature ( c) supply feedthrough (lsb/v) two typical parts, i fs = 1.2ma, v dd = 5v, 100mv, 1khz signal added to v dd 10 s/div glitch impulse (major carry transition) (i out = 3.6ma) MAX5547 toc27 out_ ac-coupled 2mv/div v pullup = 3v, r out = 500 ? , c out = 100pf, code = 1ffh to 200h 1.00s/div internal reference noise (0.1hz to 10hz) MAX5547 toc28 ref 20 v/div 1.00s/div output noise (0.1hz to 10hz) MAX5547 toc29 out_ 50 v/div 500 ? to 3v 3.6ma range code = 3ffh
MAX5547 detailed description the MAX5547 10-bit, dual-range, current-sink dac operates with serial data clock rates up to 10mhz. the double-buffered dac input consists of a 16-bit input register and two 10-bit dac registers, followed by a current-steering array (see the functional diagram ). the MAX5547 sinks full-scale output currents of 1.2ma or 3.6ma per dac. each dac? full-scale current can be independently programmed. operating from a single +2.7v to +5.25v supply, the MAX5547 typically consumes 1ma. the MAX5547 operates from an internal +2.5v reference or an exter- nal reference in the +2.45v to +2.55v range. the MAX5547 is ideal as the digital/analog interface for laser-diode drivers with current-controlled inputs, such as the max3736 (see the typical operating circuit ). set the current levels at the max3736? modset and biasset current-controlled inputs from the MAX5547? dac outputs. the max3736? modset and biasset lines set the laser driver? desired modulation and bias currents. reference architecture and operation the MAX5547 operates from an internal +2.5v refer- ence or accepts an external reference voltage source between +2.45v and +2.55v. the internal reference is capable of sinking up to 50? and sourcing up to 300?. ref serves as the input for a low-impedance reference source in external reference mode. bypass ref to gnd with a ceramic capacitor in the 0.1? to 10? range, as close to the device as possible, in both internal and external reference modes. during startup, when power is first applied, the MAX5547 defaults to external reference mode, and to the 1.2ma full-scale current-range mode. use software commands to select internal reference mode and 3.6ma full-scale current-range mode (see table 1). dac data the MAX5547? internal registers set the dac full-scale output currents (i fs ) to 1.2ma or 3.6ma (see table 1). the 10-bit dac data is decoded as straight binary, with 1 lsb = i fs / 1023, and converted into the corre- sponding current as shown in table 2. serial interface the MAX5547 operates through a 3-wire, 10mhz spi- compatible serial interface. cs , sclk, and din control the serial interface timing and data. ensure the spi bus master, typically a microcontroller (?), runs in master mode so that it generates the serial clock signal. select an sclk frequency of 10mhz or less and set the clock polarity (cpol) and phase (cpha) in the ? control registers to opposite values. the MAX5547 operates with sclk idling high or low. therefore, set cpol = 0 and cpha = 1, or cpol = 1 and cpha = 0. dual, 10-bit, current-sink output dac 8 _______________________________________________________________________________________ pin description pin name function 1v dd supply voltage. set v dd between +2.7v to +5.25v. bypass v dd with a 0.1? capacitor to gnd, as close to the device as possible. 2 cs active-low chip-select input. set cs low to enable the serial interface. 3 sclk serial-clock input 4 din serial-data input. din is clocked into the serial interface on the falling edge of sclk. 5 gnd ground 6 ref external reference input/internal reference output. when programmed for internal reference mode, ref is a +2.5v output. when programmed for external reference mode, apply a voltage between +2.45v and +2.55v (see table 1). connect a 1? ceramic capacitor from ref to gnd, as close to the device as possible. 7 outb dac b current output. outb sinks up to 3.6ma. 8 outa dac a current output. outa sinks up to 3.6ma. ? p exposed pad. connect to gnd. do not use as the ground connection.
set cs low to begin clocking input data at din on the falling edge of sclk (see figure 1). serial communica- tions to the shift register consist of a 16-bit command word loaded from din. the first four control bits (c3?0) determine the target register (see table 1). the next 10 data bits set the current-sink level. d9 is the msb and d0 the lsb. set bits s1 and s0 to zero for proper operation. data is latched into the appropriate dac register on the 16th sclk falling edge. after writ- ing 16 bits, drive cs high. keep cs low throughout the entire 16-bit word. write the command word to configure dac registers a and b individually or both registers at the same time. the command word also determines whether the dacs use the internal or external reference. the MAX5547 powers up in external reference mode with dac registers a and b set to i fs = 1.2ma at code 000h. applications information power sequencing ensure the voltages applied at ref, outa, and outb do not exceed v dd at any time. if proper power sequencing is not possible, connect an external schottky diode between ref/outa/outb and v dd to ensure compliance with the absolute maximum ratings. power-supply bypassing and ground management digital or ac transient signals on gnd create noise at the analog output. return gnd to the highest quality ground plane available. for extremely noisy environ- ments, bypass both ref and v dd to gnd with 10? and 0.1? capacitors in parallel, with the 0.1? capaci- tor as close to the device as possible. careful pc board ground layout minimizes crosstalk between the dac outputs and digital inputs. MAX5547 dual, 10-bit, current-sink output dac _______________________________________________________________________________________ 9 cs sclk t css t ds t dh t cl t ch c3 c2 s1 s0 t cp t csh t csw din figure 1. spi serial-interface timing diagram
MAX5547 dual, 10-bit, current-sink output dac 10 ______________________________________________________________________________________ control bits msb data bits lsb register function c3 c2 c1 c0 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 s1 s0 0 0 00xxxxxxx x xx00 external reference mode (default state). connect an external voltage source at ref from +2.45v to +2.55v. 1 0 00xxxxxxx x xx00 internal reference mode. internal reference is +2.5v. 0 010 10-bit data 00 load dac register a and set i outa full-scale range to 1.2ma. 0 011 10-bit data 00 load dac register a and set i outa full-scale range to 3.6ma. 0 100 10-bit data 00 load dac register b and set i outb full-scale range to 1.2ma. 0 101 10-bit data 00 load dac register b and set i outb full-scale range to 3.6ma. 0 110 10-bit data 00 load dac registers a and b and set i outa and i outb full-scale ranges to 1.2ma (default state). 0 111 10-bit data 00 load dac registers a and b and set i outa and i outb ranges to 3.6ma. table 1. command word summary x = don? care. unused codes are reserved for factory use. binary dac code i out _ 11 1111 1111 10 0000 0000 00 0000 0001 00 0000 0000 0 table 2. ideal dac output code table 1023 1023 i fs 512 1023 i fs 1023 i fs chip information process: bicmos
MAX5547 dual, 10-bit, current-sink output dac ______________________________________________________________________________________ 11 ref gnd din 1 2 outa outb cs sclk v dd tdfn top view 3 4 MAX5547 8 76 5 pin configuration outb cs din sclk serial interface dac register b dacb +2.5v reference ref range control +2.7v to +5.25v gnd +2.5v outa dac a 3.6ma/1.2ma full-scale current 3.6ma/1.2ma full-scale current range control MAX5547 v dd dac register a functional diagram
MAX5547 dual, 10-bit, current-sink output dac maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2006 maxim integrated products printed usa is a registered trademark of maxim integrated products, inc. boblet package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) 6, 8, &10l, dfn thin.eps l c l c pin 1 index area d e l e l a e e2 n g 1 2 21-0137 package outline, 6,8,10 & 14l, tdfn, exposed pad, 3x3x0.80 mm -drawing not to scale- k e [(n/2)-1] x e ref. pin 1 id 0.35x0.35 detail a b d2 a2 a1 common dimensions symbol min. max. a 0.70 0.80 d 2.90 3.10 e 2.90 3.10 a1 0.00 0.05 l 0.20 0.40 pkg. code n d2 e2 e jedec spec b [(n/2)-1] x e package variations 0.25 min. k a2 0.20 ref. 2.300.10 1.500.10 6 t633-1 0.95 bsc mo229 / weea 1.90 ref 0.400.05 1.95 ref 0.300.05 0.65 bsc 2.300.10 8 t833-1 2.00 ref 0.250.05 0.50 bsc 2.300.10 10 t1033-1 2.40 ref 0.200.05 - - - - 0.40 bsc 1.700.10 2.300.10 14 t1433-1 1.500.10 1.500.10 mo229 / weec mo229 / weed-3 0.40 bsc - - - - 0.200.05 2.40 ref t1433-2 14 2.300.10 1.700.10 t633-2 6 1.500.10 2.300.10 0.95 bsc mo229 / weea 0.400.05 1.90 ref t833-2 8 1.500.10 2.300.10 0.65 bsc mo229 / weec 0.300.05 1.95 ref t833-3 8 1.500.10 2.300.10 0.65 bsc mo229 / weec 0.300.05 1.95 ref -drawing not to scale- g 2 2 21-0137 package outline, 6,8,10 & 14l, tdfn, exposed pad, 3x3x0.80 mm downbonds allowed no no no no yes no yes no

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